112 lines
2.0 KiB
ArmAsm
112 lines
2.0 KiB
ArmAsm
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#define __SFR_OFFSET 0
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#define LED_PORT 7
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#include "avr/io.h" // ~ #include "avr/iom328p.h"
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.global init
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.global blink
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.global read_temp
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.global float_test
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init:
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sbi DDRD, LED_PORT
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ret
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float_test:
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ldi r25, 0b00111110
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ldi r24, 0b00100000
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ldi r23, 0b01000000
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ldi r22, 0b00000000
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clr r1
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ret
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blink:
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ldi r20, 250
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call delay_n_ms
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ldi r20, 250
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call delay_n_ms
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sbi PORTD, LED_PORT ; high
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ldi r20, 250
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call delay_n_ms
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cbi PORTD, LED_PORT ; low
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ret
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read_temp:
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; args: r24 to r20, where r24 is the lowest
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; return: r24 to r19, where r24 is the lowest
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cli ; forbids interruptions
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push r29
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ldi r30, 0b00000000
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sts PRR, r30
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subi r24, 14 ; because A0 is D14
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; convert pin number to bitmask (r31 is resulting mask)
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ldi r31, 1 ; means port 0
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cpi r24, 0
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breq end_convert
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ldi r29, 2
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mov r30, r24
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convert:
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mul r31, r29
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mov 31, r0
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dec r30
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cpi r30, 0
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brne convert
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end_convert:
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com r31 ; inverting mask
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; setting correct DDRC using mask
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in r30, DDRC
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and r30, r31
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out DDRC, r30
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; first two bits are for the ref voltage
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; 01 means AVcc with ext capacitor at aref
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; last three bits are for the analog port number
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ldi r30, 0b11000000
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or r30, r24
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sts ADMUX, r30
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ldi r30, 0b11000111
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sts ADCSRA, r30
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wait_adc:
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lds r30, ADCSRA
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ldi r31, 0b01000000
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and r31, r30
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cpi r31, 0
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brne wait_adc
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lds r24, ADCL
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lds r25, ADCH
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; clearing unused bits ot be sure they're zero
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ldi r31, 0b00000011
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and r25, r31
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sei ; allow interruptions
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clr r1 ; c requirement
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pop r29 ; c requirement to preserve this register
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ret
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delay_n_ms:
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; delay for ~r20 * 1ms. r20, r30, and r31 are modified.
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; 1 ms ~ 16000 cycles at 16MHz.
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; The basic loop takes about 5 cycles, so we need about 3000 loops.
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ldi r31, 3000 >> 8 ; high byte of the 3000
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ldi r30, 3000 & 255 ; low byte of the 3000
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delaylp:
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sbiw r30, 1 ; sub word r30 1
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brne delaylp ; jne delaylp
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subi r20, 1
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brne delay_n_ms
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ret
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