Optimizations
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@ -3,16 +3,55 @@
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#include "avr/io.h" // ~ #include "avr/iom328p.h"
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.section .bss
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lm35_port: .byte 0
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.section .text
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.global init
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.global blink
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.global read_temp
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.global float_test
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.global lm35_init
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.global lm35_read
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init:
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sbi DDRD, LED_PORT
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ret
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analog_pin_mode_input:
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; sets analog pin as input
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; input: r24 - number of pin in DDRC I/O register
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; output: -
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; r31 mask to set 0 in I/O register
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ldi r31, 1 ; means port 0
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cpi r24, 0
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breq end_convert ; = 0 => no need to convert (already set mask to port 0)
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mov r30, r24
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convert:
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lsl r31 ; logic shift left ~ r31 * 2
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dec r30
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cpi r30, 0
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brne convert
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end_convert:
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com r31 ; inverting mask (00001000 -> 11110111)
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; setting correct DDRC using mask
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in r30, DDRC
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and r30, r31 ; applying mask (11111111 and 11110111 = 11110111)
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out DDRC, r30
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ret
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lm35_init:
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; args: r24 to r20, where r24 is the lowest
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subi r24, 14 ; because A0 is D14
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call analog_pin_mode_input
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sts lm35_port, r24
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ret
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float_test:
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ldi r25, 0b00111110
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ldi r24, 0b00100000
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@ -34,42 +73,18 @@ blink:
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ret
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read_temp:
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; args: r24 to r20, where r24 is the lowest
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lm35_read:
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; return: r24 to r19, where r24 is the lowest
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cli ; forbids interruptions
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push r29
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ldi r30, 0b00000000
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sts PRR, r30
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subi r24, 14 ; because A0 is D14
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; convert pin number to bitmask (r31 is resulting mask)
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ldi r31, 1 ; means port 0
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cpi r24, 0
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breq end_convert
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ldi r29, 2
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mov r30, r24
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convert:
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mul r31, r29
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mov 31, r0
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dec r30
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cpi r30, 0
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brne convert
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end_convert:
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com r31 ; inverting mask
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; setting correct DDRC using mask
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in r30, DDRC
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and r30, r31
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out DDRC, r30
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; first two bits are for the ref voltage
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; 01 means AVcc with ext capacitor at aref
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; 11 means using internal 1.1v atmega voltage for adc
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; last three bits are for the analog port number
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ldi r30, 0b11000000
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lds r24, lm35_port
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or r30, r24
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sts ADMUX, r30
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@ -86,13 +101,33 @@ wait_adc:
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lds r24, ADCL
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lds r25, ADCH
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; clearing unused bits ot be sure they're zero
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; clearing unused bits to be sure they're zero
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ldi r31, 0b00000011
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and r25, r31
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; r25 high, r24 low - divident and then quotient
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; r30 - res
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ldi r30, 0
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division:
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cpi r24, 10
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brlo division_low_end ; <
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continue_division:
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sbiw r24, 10
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inc r30
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rjmp division
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division_low_end:
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cpi r25, 0
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brne continue_division
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cpi r24, 5
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brlo not_inc ; <
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inc r30
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not_inc:
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mov r24, r30 ; uint8_t return value
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adiw r24, 2 ; due to LM35 formula (2C to 150C)
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sei ; allow interruptions
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clr r1 ; c requirement
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pop r29 ; c requirement to preserve this register
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ret
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@ -3,7 +3,8 @@ extern "C" {
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void blink();
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float float_test();
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uint16_t read_temp(uint8_t port);
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void lm35_init(uint8_t port);
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uint8_t lm35_read();
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}
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#define UNKNOWN_PIN 0xFF
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@ -34,6 +35,16 @@ uint8_t getPinMode(uint8_t pin)
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return INPUT;
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}
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void printPortsStatus() {
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Serial.print(getPinMode(A0));
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Serial.print(getPinMode(A1));
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Serial.print(getPinMode(A2));
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Serial.print(getPinMode(A3));
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Serial.print(getPinMode(A4));
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Serial.print(getPinMode(A5));
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Serial.println();
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}
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/*
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ADC Prescaler Select Bits (ADPS): ADPS2, ADPS1 and ADPS0 bits are used to set circuit clock frequency.
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For ADC circuitry to work at its maximum resolution needs to be supplied with 50 kHz to 200 kHz frequency as per the datasheet;
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@ -48,6 +59,7 @@ uint8_t getPinMode(uint8_t pin)
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void setup() {
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Serial.begin(9600);
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lm35_init(A3);
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// init();
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}
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@ -68,7 +80,7 @@ void loop() {
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// Serial.println((float)k * 0.43137254 + 2);
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// pinMode(A3, OUTPUT);
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float *f = malloc(sizeof(f));
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/*float *f = malloc(sizeof(f));
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*f = float_test();
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for (int i = 0; i < 4; i++) {
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}
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Serial.print(" => ");
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Serial.print(*f, 8);
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Serial.println();
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Serial.println();*/
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// uint16_t k = read_temp(A3);
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/*Serial.print(getPinMode(A0));
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Serial.print(getPinMode(A1));
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Serial.print(getPinMode(A2));
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Serial.print(getPinMode(A3));
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Serial.print(getPinMode(A4));
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Serial.print(getPinMode(A5));
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Serial.println();*/
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// Serial.println((float)k / 1023 * 1.1 * 1000 / 10 + 2);
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// Serial.println((float)k * 0.10752688 + 2);
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uint8_t t = lm35_read();
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printPortsStatus();
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Serial.println(t);
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//Serial.print(" vs ");
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}
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